1. Field of the Invention
The present invention relates to a semiconductor device.
2. Background of the Related Art
To date, transformers and photocouplers, whose input side and output side are electrically isolated, have been in the public domain as semiconductor elements used in the gate drive of a switching element such as an IGBT (insulated gate bipolar transistor) that configures a power converting bridge circuit in an industrial inverter. Also, high voltage ICs (HVIC), whose input side and output side are not electrically isolated, are being used in recent years, mainly in low power inverter applications, in order to reduce cost (for example, refer to T. Yamazaki and 6 others, “New High Voltage Integrated Circuits Using Self-Shielding Technique”, Proceedings of the 11th International Symposium on Power Semiconductor Devices and ICs, 1999 (ISPSD '99), Toronto, May, 1999, Pages 333 to 336. (Non-patent Literature 1) and Japanese Patent No. 3,214,818 (Patent Literature 1).
For example, a high voltage IC wherein a low cost bulk substrate can be used, and which is fabricated by an IC process using self-isolation technology that does not require a special element isolation process, is disclosed in Non-Patent Literature 1. A description will be given of the structure of a high voltage IC fabricated using a self-isolation IC process. FIG. 6 is a plan view schematically showing the planar structure of an existing high voltage IC. FIG. 7 is a sectional view showing the sectional structure along a cutting line AA-AA′ of FIG. 6. FIG. 8 is a circuit diagram showing an equivalent circuit of the high voltage IC of FIG. 7.
As shown in FIGS. 6 and 7, a high voltage IC 200 generally includes a high side drive circuit 210, a level shifter 214, and a control circuit 215. The high side drive circuit 210 includes a gate drive circuit, a level shift resistor, and the like. The high side drive circuit 210 is disposed in a high side drive circuit region 220. The periphery of the high side drive circuit region 220 is enclosed by a high withstand voltage isolation region 224. The high side drive circuit region 220 is electrically isolated by the high withstand voltage isolation region 224 from a low side region 225 in which a low side drive circuit (not shown) is disposed. The level shifter 214 is disposed in the high withstand voltage isolation region 224.
The periphery of the high withstand voltage isolation region 224 is enclosed by the low side region 225. The control circuit 215, which controls the high side drive circuit 210, is disposed in the low side region 225. The low side region 225 is a portion excluding the high side drive circuit region 220 and high withstand voltage isolation region 224. A gate drive circuit 211 configuring the high side drive circuit 210 is formed of a CMOS (complementary MOS) circuit wherein a high side p-channel MOSFET (insulated gate field-effect transistor, hereafter referred to as a PMOS) 212 and low side n-channel MOSFET (hereafter referred to as an NMOS) 213 are connected so as to complement each other.
A high voltage IC formed using a self-isolation IC process is such that the lateral PMOS 212 of the high side drive circuit 210 is formed in an n−-type diffusion region 202 selectively provided in a surface layer of a p-type bulk substrate 201. A p−-type diffusion region 203 is provided to a comparatively small depth inside the n−-type diffusion region 202, and the lateral NMOS 213 is formed in the p−-type diffusion region 203. The n−-type diffusion region 202 is connected to a VB terminal, which has the highest potential of the high side drive circuit 210. The p−-type diffusion region 203 is connected to a VS terminal, which has the lowest potential of the high side drive circuit 210. The difference in potential between the VB terminal and VS terminal is in the region of, for example, 9V to 24V, which is the power supply voltage of the high side drive circuit 210.
A p−-type region 204 is provided in the low side region 225 on the outside of the n−-type diffusion region 202 in a surface layer of the p-type bulk substrate 201. The p-type bulk substrate 201 and p−-type region 204 are connected to a GND terminal of ground potential (for example, 0V). An n−-type low concentration diffusion region 205 configuring the high withstand voltage isolation region 224 is provided between the n−-type diffusion region 202 and p−-type region 204. When the potential of the high side drive circuit region 220 rises to a high voltage 600V or more higher than that of the low side region 225, the n−-type low concentration diffusion region 205 is depleted owing to the p-n junction between the n−-type low concentration diffusion region 205 and p−-type region 204 being reverse biased, and the lateral direction (the direction parallel to the substrate main surface) withstand voltage is maintained.
As shown in FIG. 8, the high voltage IC 200 is connected to, for example, a power converting bridge circuit, and drives first and second MOSFETs 101 and 102 configuring one phase of the power converting bridge circuit. The first and second MOSFETs 101 and 102 are connected in series between a high voltage main power supply (positive electrode side) Vdc and the ground potential GND, which is the negative electrode side of the main power supply. The VS terminal is connected to a connection point 105 of the first MOSFET 101 and second MOSFET 102. The connection point 105 is an output point of the bridge circuit configured of the first and second MOSFETs 101 and 102. Reference signs 103 and 104 are FWDs (free wheeling diodes).
A description will be given of operations of the high voltage IC 200, taking as an example a case of driving the first MOSFET 101 on the high side of the power converting bridge circuit. The high side drive circuit 210, taking the potential of the connection point 105 to which the VS terminal is connected as a reference potential VS, operates at a potential between the reference potential VS and the power supply potential VB, which is the highest potential of the high side drive circuit 210. The control circuit 215, operating with the ground potential GND as a reference, generates a low side level on/off signal for turning the first MOSFET 101 on and off. The low side level on/off signal is converted into a high side level on/off signal by the level shifter 214, and transmitted to the high side drive circuit 210. The on/off signal input into the high side drive circuit 210 is input into the gate of the first MOSFET 101 via a NOT circuit and the subsequent gate drive circuit 211. The first MOSFET 101 is turned on and off in accordance with the on/off signal.
The first MOSFET 101 is turned on and off in accordance with the on/off signal from the control circuit 215 transmitted via the level shifter 214 in this way. The potential of the VS terminal fluctuates between 0V (GND) and several hundred volts (Vdc) while the high voltage IC 200 is operating. Signal transmission by the level shifter 214 is carried out by current being caused to flow into a level shift resistor 217 connected between the drain of the level shifter 214 and the VB terminal, and voltage drop in the level shift resistor 217 being detected. Therefore, the drain of the level shifter 214 and the component of the power supply potential VB of the high side drive circuit 210 have to be electrically isolated. A high voltage IC having a structure wherein the high withstand voltage isolation region and level shifter are integrated, and configured so that the drain of the level shifter 214 and the component of the power supply potential VB of the high side drive circuit 210 are electrically isolated, is disclosed in Patent Literature 1.
However, although a drive circuit in an integrated circuit is generally configured by combining a low breakdown voltage MOSFET with a guaranteed breakdown voltage in the region of 5V and an intermediate breakdown voltage MOSFET with a guaranteed breakdown voltage in the region of 24V, it is difficult to use a low breakdown voltage MOSFET for the high side drive circuit 210 in the existing high voltage IC 200. The reason for this is as follows. Voltage in the region of 9V to 24V (the power supply voltage VB of the high side drive circuit 210), which exceeds the guaranteed breakdown voltage of a low breakdown voltage MOSFET, is applied to the high side drive circuit region 220 in which the high side drive circuit 210 is formed. Therefore, in order to use a low breakdown voltage MOSFET for the high side drive circuit 210, a special circuit configuration is needed so that voltage exceeding the guaranteed breakdown voltage is not applied to the low breakdown voltage MOSFET.
As this kind of problem occurs, it is generally the case in existing high voltage ICs that the high side drive circuit is configured of only intermediate breakdown voltage MOSFETs, without using a low breakdown voltage MOSFET, even when a circuit portion that can be configured of a low breakdown voltage MOSFET exists. There is no description of a method whereby a low breakdown voltage MOSFET is used for the high side drive circuit in Non-Patent Literature 1 or Patent Literature 1 either. However, the higher the breakdown voltage of a MOSFET, the greater the drain-to-source distance of a MOSFET configuring the high side drive circuit, because of which the on-state resistance per unit area increases. Therefore, problems occur in that the current that can be caused to flow by the device decreases, operation becomes slower, the device size increases in order to increase the current, and the like. Therefore, a gate drive circuit configured of only intermediate breakdown voltage MOSFETs is inferior in terms of performance and size to a gate drive circuit configured of a low breakdown voltage MOSFET and an intermediate breakdown voltage MOSFET.
The invention, in order to resolve the problems of the heretofore described existing technology, has an object of providing a semiconductor device such that a reduction in size and an increase in performance can be realized.